The present invention relates to the design, modeling, simulation, and emulation of electronic circuitry. More specifically, the present invention relates to numerical time-domain simulation of analog or digital electrical circuits using mathematical expressions. Present simulation systems suffer from limitations in the kinds and topologies of circuits to which they may be applied. The complexity of systems to be simulated is also limited in current systems by various inefficiencies in the simulation modeling process, including state selection and state equation building methods. There is thus a need for further contributions and improvements to circuit simulation technology.
Existing techniques for circuit simulation include two approaches. In one, the underlying numerical algorithms are based upon a state-space model of the system being simulated or analyzed. The system to be simulated is specified either in the form of a text file using a well-defined syntax, or graphically using boxes or icons to represent computational elements such as summers, multipliers, integrators, function generators, and/or transfer functions, for example. General purpose mathematical packages operate the models by assembling a state-space model of the system from the user-supplied description. The time-domain response is then calculated numerically using established integration algorithms.
In the other category of solutions, the system is described as an electrical circuit, the fundamental branches of which may include resistors, inductors, capacitors, voltage sources, and/or current sources, for example. Other circuit elements such as diodes, transistors, or electromechanical devices may also be defined as a variation or a combination (sub-circuit) of the fundamental branches. In this type of simulation system, the model developer describes the circuit in the form of a list of parameters of the fundamental or user-defined circuit elements and the layout of the circuit. Nodal or modified-nodal analysis techniques are then employed to simulate operation of the circuit. In that process, the differential equations associated with each inductive and capacitive branch are modeled in discrete form using difference equations to relate the branch current and voltage at a given instant of time to the branch current and/or voltage at one or more preceding instants of time. The difference equations for the overall circuit are then assembled automatically and solved using established methods to simulate the time-domain response.
It is of note that the second category of systems does not force the model developer to derive the state equations or block-diagram representation of the circuit. On the other hand, a state-space model of the overall circuit is never established or calculated by the program. Consequently, the numerous (and generally more efficient) techniques for analysis of state-space models cannot be applied in such systems.
More recently, a system has been developed that produces a state-space realization for the linear part of a system, the non-linear portion and variable parameters being represented as separate or external blocks. The overall system is then simulated using the appropriate solvers in the host mathematical package. In these systems, however, switches are modeled as resistors with very small or very large values. The resulting state model, therefore, may be artificially stiff and have larger dimension than necessary because of the states artificially introduced by the resistor-based switch model. In addition, the system does not incorporate mutual, non-linear, or variable inductances, capacitances, and resistances in its standard library blocks and components.
Some work on an automated state model generator, and circuit simulator (ASMG) is reported in O. Wasynczuk and S. D. Sudoff, “Automated State Model Generation Algorithm for Power Circuits and Systems,” IEEE Transactions on Power Systems, Vol. 11, No. 9, November 1996, pp. 1951-1956. In this work, circuits are specified and analyzed using fundamental branches as shown in FIG. 1. Each fundamental branch includes a switch, resistor rbr, inductor Lbr, voltage source ebr, conductance gbr, capacitor Pbr, and current source jbr. Each parameter can be fixed or time-varying, and ideal components can be modeled by setting the remaining parameters to zero. Given the parameters for each branch and the list of nodes that the branches connect, the ASMG generates a state-space model of the overall circuit. The state-space representation is calculated and solved using numerical methods. If a change in switching state occurs, the state model generator then recalculates the state-space model and establishes the appropriate initial conditions for the new topology. A disadvantage of this system is that it cannot be used to simulate circuits that include loops composed of voltage sources, capacitors, and/or resistors. This limitation dramatically hindered the ability of the ASMG to simulate high-frequency switching transients of power-electronic-based systems.
Subsequent improvements to the ASMG is the fundamental branches illustrated in FIG. 2 using the same notation for parameters as was used in FIG. 1. Using this form of modeling, more complicated circuit elements could be represented, including transistors, diodes, and thyristors. These improvements are discussed in J. Jatskevich, “A State Selection Algorithm for the Automated State Model Generator,” Ph.D. Thesis, Purdue University, 1999. Additional improvements are described herein.
As used herein, a “spanning tree” over a graph (comprising a set of branches and a set of nodes to which the branches are connected) is defined to be a subset of the set of branches such that at least one branch in the subset is connected to each node from the set of nodes, yet no loop can be formed from the branches in the subset.
Also, as used herein, a “topology change event” occurs when the control signal for one or more switching elements causes the switching state of that element to change. The nodes to which that element is connected will then become (or cease to be) galvanically connected to another portion of the circuit. In most cases, this change affects the state equations for the overall circuit.